DocumentCode :
2978552
Title :
Optimization and control of VDD and VTH for low-power, high-speed CMOS design
Author :
Kuroda, Tadahiro
Author_Institution :
Dept. of Electr. Eng., Keio Univ., Yokohama, Japan
fYear :
2002
fDate :
10-14 Nov. 2002
Firstpage :
28
Lastpage :
34
Abstract :
It is essential to control supply voltage VDD and threshold voltage VTH for low power, high-speed CMOS design. In this paper, it is shown that these two parameters can be controlled by designers as objectives of design optimization to find better trade-offs between power and speed. Quantitative analysis of trade-offs between power and speed is presented. Some of the popular circuit techniques and design examples to control VDD and VTH are introduced. A simple theory to compute optimum multiple VDD and VTH values is described. Scaling scenarios of variable and/or multiple VDD and VTH values is discussed to show future technology directions.
Keywords :
CMOS integrated circuits; circuit optimisation; high-speed integrated circuits; integrated circuit design; low-power electronics; circuit techniques; design optimization; design parameters; design trade-offs; low-power high-speed CMOS design; multiple value scaling scenarios; quantitative analysis; supply voltage; threshold voltage; voltage control; voltage optimization; CMOS logic circuits; Degradation; Delay; Design optimization; Pipelines; Power dissipation; Subthreshold current; Throughput; Virtual manufacturing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on
ISSN :
1092-3152
Print_ISBN :
0-7803-7607-2
Type :
conf
DOI :
10.1109/ICCAD.2002.1167510
Filename :
1167510
Link To Document :
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