Title :
A Mesh-Connected Rings Topology for Network-on-Chip
Author :
Liu Youyao ; Han Jungang
Author_Institution :
Sch. of Electron. Eng., Xi´an Univ. of Posts & Telecommun., Xi´an, China
Abstract :
With the feature size of semiconductor technology reduced and (Intellectual Properties) IP cores increased, on chip interconnection network architectures have a great influence on the performance and area of System-on-Chip(SoC) design. Focusing on trade-off performance, cost and implementation, a regular Network-on-Chip NoC architecture, named Mesh-Connected Rings (MCR) interconnection network, is proposed. The topology of MCR is simple, planar and scalable in architecture, which combines Mesh with Ring. A detailed theoretical analysis for MCR and Mesh is given, and a simulation analysis based on the virtual channel router with wormhole switching is also presented. The results compared with the general Mesh architecture show that MCR has better performance, especially in local traffics and low loads, and lower cost.
Keywords :
integrated circuit interconnections; logic circuits; logic design; microprocessor chips; network topology; network-on-chip; system-on-chip; IP cores; MCR interconnection network; NoC architecture; SoC design; chip interconnection network architectures; intellectual property cores; mesh-connected ring interconnection network; mesh-connected ring topology; network-on-chip; network-on-chip architecture; system-on-chip design; virtual channel router; wormhole switching; Clocks; Multiprocessor interconnection; Network topology; Routing; Structural rings; Throughput; Topology; System-on-Chip; Network-on-Chip; Network Topology; Routing Algorithms; Performance evaluation;
Conference_Titel :
Parallel and Distributed Computing, Applications and Technologies (PDCAT), 2012 13th International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-0-7695-4879-1
DOI :
10.1109/PDCAT.2012.142