DocumentCode
2978713
Title
New multilevel inverter with reduction of switches and gate driver
Author
Banaei, M.R. ; Salary, E.
Author_Institution
Electr. Eng. Dept., Azarbaijan Univ. of Tarbiat Moallem, Tabriz, Iran
fYear
2010
fDate
11-13 May 2010
Firstpage
784
Lastpage
789
Abstract
This paper presents a novel topology for symmetrical cascaded multilevel converter. The proposed circuit consists of series connected sub multilevel converters blocks and it can generate DC voltage levels similar to other topologies. The proposed topology results in reduction of switches number, losses, installation area and converter cost. This converter has been used in a Dynamic Voltage Restorer (DVR). Simulation results carried out by MATLAB/SIMULINK show the voltage injection capability of converter and the efficiency of its controller in compensating voltage sag and swell.
Keywords
Circuit simulation; Circuit topology; Costs; DC generators; Driver circuits; Inverters; MATLAB; Switches; Switching converters; Voltage fluctuations; DVR; Multilevel inverter; Reduction of switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering (ICEE), 2010 18th Iranian Conference on
Conference_Location
Isfahan, Iran
Print_ISBN
978-1-4244-6760-0
Type
conf
DOI
10.1109/IRANIANCEE.2010.5506968
Filename
5506968
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