DocumentCode :
2979276
Title :
SIMP (single Instruction Stream/multiple Instruction Pipelining): A Novel High-speed Single-processor Architecture
Author :
Murakami, Kazuaki ; Irie, Naohiko ; Kuga, Morihiro ; Tomita, Shinji
Author_Institution :
Kyushu University
fYear :
1989
fDate :
28 May-1 Jun 1989
Firstpage :
78
Lastpage :
83
Keywords :
Computer architecture; Information systems; Out of order; Parallel architectures; Parallel processing; Permission; Pipeline processing; Reduced instruction set computing; Spatial resolution; VLIW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture, 1989. The 16th Annual International Symposium on
ISSN :
1063-6897
Print_ISBN :
0-8186-8948-X
Type :
conf
DOI :
10.1109/ISCA.1989.714527
Filename :
714527
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2979276
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