DocumentCode :
2980135
Title :
Noise propagation and failure criteria for VLSI designs
Author :
Zolotov, V. ; Blaauw, D. ; Sirichotiyakul, S. ; Becer, M. ; Oh, C. ; Panda, R. ; Grinshpon, A. ; Levy, R.
Author_Institution :
Motorola Inc., USA
fYear :
2002
fDate :
10-14 Nov. 2002
Firstpage :
587
Lastpage :
594
Abstract :
Noise analysis has become a critical concern in advanced chip designs. Traditional methods suffer from two common issues. First, noise that is propagated through the driver of a net is combined with noise injected by capacitively coupled aggressor nets using linear summation. Since this ignores the non-linear behavior of the driver gate the noise that develops on a net can be significantly underestimated. We therefore propose a new linear model that accurately combines propagated and injected noise on a net and which maintains the efficiency of linear simulation. After the propagated and injected noise are correctly combined on a victim net, it is necessary to determine if the noise can result in a functional failure. This is the second issue that we discuss in this paper. Traditionally, noise failure criteria have been based on unity gain points of the DC or AC transfer curves. However, we will show that for digital designs, these approaches can result in a pessimistic analysis in some cases, while in other cases, they allow circuit operation that is extremely close to regions that are unstable and do not allow sufficient margin for error in the analysis. In this paper, we compare the effectiveness of the discussed noise failure criteria and also present a propagation based method, which is intended to overcome these drawbacks. The proposed methods were implemented in a noise analysis tool and we demonstrate results on industrial circuits.
Keywords :
VLSI; circuit simulation; driver circuits; failure analysis; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; logic design; logic simulation; DC/AC transfer curve unity gain points; VLSI design noise failure criteria; VLSI interconnects; VLSI noise propagation; analysis error margins; capacitively coupled aggressor nets; driver gate nonlinear behavior; linear modeling/simulation; linear summation; net driver circuits; noise analysis; noise analysis tools; noise generated functional failures; noise injection; victim nets; Chip scale packaging; Circuit noise; Delay; Noise figure; Noise shaping; Performance analysis; Pulse shaping methods; Space vector pulse width modulation; Sun; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on
ISSN :
1092-3152
Print_ISBN :
0-7803-7607-2
Type :
conf
DOI :
10.1109/ICCAD.2002.1167592
Filename :
1167592
Link To Document :
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