• DocumentCode
    2981198
  • Title

    A 2 Gb/s/pin 4-PAM parallel bus interface with transmit crosstalk cancellation, equalization, and integrating receivers

  • Author

    Zerbe, J.L. ; Chau, P.S. ; Werner, C.W. ; Stonecypher, W.F. ; Liaw, H.J. ; Gong Jong Yeh ; Thrush, T.P. ; Best, S.C. ; Donnelly, K.S.

  • Author_Institution
    Rambus, Mountain View, CA, USA
  • fYear
    2001
  • fDate
    7-7 Feb. 2001
  • Firstpage
    66
  • Lastpage
    67
  • Abstract
    A 2 Gb/s/pin single-ended 4-PAM parallel bus interface uses transmit crosstalk cancellation and equalization techniques as well as integrating data receivers to improve system margin in low-cost packaging despite inherent coupling noise and data distortion.
  • Keywords
    crosstalk; equalisers; integrated circuit packaging; interference suppression; pulse amplitude modulation; receivers; system buses; 2 Gbit/s; 4-PAM parallel bus interface; coupling noise; data distortion; integrating data receiver; packaging; transmit crosstalk cancellation; transmit equalization; Attenuation; Crosstalk; Eyes; Frequency; Intersymbol interference; MOS devices; Master-slave; Packaging; System testing; Transmitters;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-6608-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2001.912549
  • Filename
    912549
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2981198