A 77 GHz controllable gain low noise amplifier

A 77 GHz low noise amplifier has been designed using common source topology implemented in low cost CMOS technology for various applications. A new method has been proposed for the design of the amplifier. In this method, input/output matching networks and transistor gate widths have been optimized for maximum gain and minimum noise figure. The design is flexible such that the LNA can operate in both high gain/high power and low gain/low power modes with low noise figure of less than 7 dB at 77 GHz. Amplifier gain is better than 18 dB consuming 60mW of dc power and it is better than 14.5 dB consuming 30 mW of dc power. The input and output return losses are better than 10 dB in the frequency range of 72 to 82 GHz.