DocumentCode
2981323
Title
Extended synchronous dataflow for efficient DSP system prototyping
Author
Park, Chanik ; Chung, Jaewoong ; Ha, Soonhoi
Author_Institution
Dept. of Comput. Eng., Seoul Nat. Univ., South Korea
fYear
1999
fDate
36342
Firstpage
196
Lastpage
201
Abstract
Though dataflow graph has been a successful input specification language for DSP system prototyping, lack of support for global states makes it unsuitable to some important applications that need global states for efficient implementation. In this paper, we propose an extension of synchronous dataflow graph to accommodate global states without side effects. Global states are accessed by a special block that piggybacks the state update request on data samples. Such an extension enlarges the domain of application where dataflow representation can be used for rapid system prototyping. The only penalty it incurs is scheduling complexity since the scheduler now considers the control dependency as well as data dependency. We show experimental results with real-life examples such as MPEG-audio decoder and 3D graphics pipeline to present the novelty and usefulness of our approach
Keywords
computational complexity; data flow graphs; processor scheduling; software prototyping; 3D graphics pipeline; DSP system prototyping; MPEG-audio decoder; control dependency; data dependency; dataflow graph; dataflow representation; extended synchronous dataflow; input specification language; rapid system prototyping; scheduling complexity; Application software; Data engineering; Decoding; Design engineering; Digital signal processing; Pipelines; Prototypes; Read only memory; Silicon compounds; Specification languages;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 1999. IEEE International Workshop on
Conference_Location
Clearwater, FL
Print_ISBN
0-7695-0246-6
Type
conf
DOI
10.1109/IWRSP.1999.779053
Filename
779053
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