DocumentCode :
2981990
Title :
A +18 dBm IIP3 LNA in 0.35 /spl mu/m CMOS
Author :
Yongwang Ding ; Harjani, R.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
fYear :
2001
fDate :
7-7 Feb. 2001
Firstpage :
162
Lastpage :
163
Abstract :
A feedforward linearization technique for RF CMOS LNAs makes feasible up to 40 dB output linearity improvement in current CMOS processes. A high-linearity LNA with +18 dBm IIP3 in a 0.35 /spl mu/m CMOS process shows little impact on power, noise, and gain.
Keywords :
CMOS analogue integrated circuits; feedforward; linearisation techniques; radiofrequency amplifiers; 0.35 micron; IIP3; RF CMOS LNA; feedforward linearization; linearity; Circuit noise; Energy consumption; Equations; Impedance matching; Linearity; MOSFETs; Noise cancellation; Noise figure; Semiconductor device measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-6608-5
Type :
conf
DOI :
10.1109/ISSCC.2001.912587
Filename :
912587
Link To Document :
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