Dual processor VHSIC MIL-STD-1750 A computer module

The design of a MIL-STD-1750 A computer implemented on a SEM-E size module is described. The module features a unique multi-processor architecture with two 1750 A-compatible processors and two intelligent PI-bus interface devices sharing a common on-board memory. The module implements the 1750 A memory mapping scheme, includes circuitry for processor control during software debug, and circuitry for built-in-test. The module has external interfaces for a dual PI-bus, a dual TM-bus, an IEEE-488 bus, discretes, and interrupts. Several novel technologies have come together in order to implement all of these features on single-width SEM-E size module. First, VHSIC-class technology was utilized to develop seven complex ICs in submicrometer CMOS to implement the primary functions. Next, fine-pitch leadless ceramic chip carrier packages were developed to reduce the size of the high pinout devices. Finally, advanced, high density, surface mount compatible, board technology was required for enhanced solder-joint reliability