The SF1 real-time computer

Author

Dixon, R.D. ; Calle, M. ; Longway, C.W. ; Peterson, L.S. ; Siferd, R.E.

Author_Institution

Wright State Univ., Dayton, OH, USA

fYear

1988

fDate

23-27 May 1988

Firstpage

60

Abstract

The SF1 is a 32-bit computer designed to allow programming of real-time applications in high-level languages. The SF1 is based on specialized smart memories, called stack-frames, built in VLSI. The first implementation will execute more than 10 million complex instructions per second and can switch contexts in a rich environment in 500 nanoseconds. The design is simple and allows direct programming in an algebraic language. The key features allowing application of SF1 for reliable and high-performance real-time systems are simplicity of design, hardware support for context switching, and hardware optimization of local data references

Keywords

VLSI; integrated memory circuits; microcomputers; real-time systems; 10 MIPS; 32 bit; 32-bit computer; 500 ns; SF1 real-time computer; VLSI; algebraic language; direct programming; features; hardware optimization of local data references; hardware support for context switching; high-level languages; programming of real-time applications; rich environment; simplicity of design; specialized smart memories; stack-frames; CMOS technology; Computerized monitoring; Design optimization; Error analysis; Gallium arsenide; Hardware; Optimizing compilers; Programming profession; Registers; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Aerospace and Electronics Conference, 1988. NAECON 1988., Proceedings of the IEEE 1988 National

Conference_Location

Dayton, OH

Type

conf

DOI

10.1109/NAECON.1988.194995

Filename

194995