Title :
A 2.3 GSample/s 10-tap digital FIR filter for magnetic recording read channels
Author :
Rylov, S. ; Rylyakov, A. ; Tierno, J. ; Immediato, M. ; Beakes, M. ; Kapur, M. ; Ampadu, P. ; Pearson, D.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
A 6 b 10 tap 2.3 GSample/s distributed-arithmetic digital FIR filter uses footless dynamic logic with delayed reset for precharge. The 0.5 mm/sup 2/ filter, fabricated in 0.18 /spl mu/m CMOS, is operational from 1 V to 2 V power supply. At 2.3 GSample/s, the power is 680 mW, and at 1 GSample/s the power is 120 mW.
Keywords :
CMOS digital integrated circuits; FIR filters; digital arithmetic; magnetic recording; 0.18 micron; 1 to 2 V; 120 to 680 mW; 6 bit; CMOS IC; digital FIR filter; distributed arithmetic; footless dynamic logic; magnetic recording; read channel; Clocks; Delay; Feedback; Finite impulse response filter; Logic; Magnetic recording; Magnetic separation; Maximum likelihood detection; Multiplexing; Shift registers;
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6608-5
DOI :
10.1109/ISSCC.2001.912599
