Title :
A fully-integrated 5 GHz CMOS wireless-LAN receiver
Author :
Samavati, H. ; Rategh, H.R. ; Lee, T.H.
Author_Institution :
Stanford Univ., CA, USA
Abstract :
A fully-integrated 5 GHz wireless LAN receiver in 0.24 /spl mu/m CMOS consumes 59 mW and occupies 4 mm/sup 2/ die space. The overall image rejection is 53 dB and the noise figure is 7.2 dB. IIP3 is -7 dBm and LO leakage to the RF port is -87 dBm. The synthesized LO phase noise is -134 dBc/Hz at 22 MHz and all spurs are below -70 dBc.
Keywords :
CMOS integrated circuits; radio receivers; wireless LAN; 0.24 micron; 5 GHz; 59 mW; 7.2 dB; IIP3; LO leakage; RF port; fully-integrated CMOS receiver; image rejection; noise figure; phase noise; wireless LAN; Baseband; Capacitors; Charge pumps; Circuits; Filters; Fractals; Frequency; Parasitic capacitance; Receivers; Synthesizers;
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6608-5
DOI :
10.1109/ISSCC.2001.912607
