DocumentCode
2982511
Title
RC Interconnect Model Order Reduction with Truncation Balanced Reduction
Author
Dongsheng, Yang ; Lei, Zhan ; Jianwei, Fan
Author_Institution
First Aeronaut. Inst. of the Air Force, Xinyang
fYear
2007
fDate
18-21 April 2007
Firstpage
1
Lastpage
3
Abstract
Interconnect becomes one of the major factors of today´s VLSI circuit design. Its modeling and simulation are becoming more challenging and very difficult. This paper describes the truncation balanced reduction (TBR) algorithms in the model reduction of RC interconnect. Simulation is executed to RC interconnect and may be improve VLSI interconnect system modeling and design technology.
Keywords
VLSI; integrated circuit interconnections; integrated circuit modelling; reduced order systems; RC interconnect; VLSI; integrated circuit interconnections; model order reduction; truncation balanced reduction; Circuit analysis computing; Circuit simulation; Circuit synthesis; Computational modeling; Distributed computing; Integrated circuit interconnections; Integrated circuit modeling; Integrated circuit technology; Reduced order systems; Very large scale integration; Model Order Reduction; RC Interconnect; Truncation Balanced Reduction;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave and Millimeter Wave Technology, 2007. ICMMT '07. International Conference on
Conference_Location
Builin
Print_ISBN
1-4244-1049-5
Electronic_ISBN
1-4244-1049-5
Type
conf
DOI
10.1109/ICMMT.2007.381407
Filename
4266166
Link To Document