Title :
A process-portable 64b embedded microprocessor with graphics extensions and a 3.6 GB/s interface
Author :
Ying-Wai Ho ; Bhasin, I. ; Chiu, T. ; Forssell, P. ; von Kaenel, V. ; Jiang, J. ; Kelley, J. ; Matthews, D. ; Nasir, Q. ; Patel, K. ; Peng, V. ; Rajagopalan, V. ; Reaves, J. ; Saha, U. ; Tien, G. ; Townley, K. ; Ukanwa, M. ; Werner, J.
Author_Institution :
MIPS Technol. Inc., Mountain View, CA, USA
Abstract :
A custom yet process-portable dual-issue 64b embedded microprocessor implements the MIPS64/sup TM/ architecture with 3D graphics geometry processing extensions and a 3.6 GB/s interface. In a 0.18 /spl mu/m 6 layer metal process, the 34 mm/sup 2/ processor is expected to function up to 600 MHz, and dissipate 2 W at 1.5 V and 500 MHz.
Keywords :
computer architecture; computer graphics; microprocessor chips; 0.18 micron; 1.5 V; 2 W; 3.6 GB/s; 3D graphics; 500 to 600 MHz; 64 bit; MIPS64; graphics extensions; process-portable embedded microprocessor; six-layer metal process; Acceleration; CADCAM; CMOS technology; Computer aided manufacturing; Coupling circuits; Geometry; Graphics; Microprocessors; Process design; Timing;
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-6608-5
DOI :
10.1109/ISSCC.2001.912618
