A digital 72 Mb/s 64-QAM OFDM transceiver for 5 GHz wireless LAN in 0.18 /spl mu/m CMOS

Author

Eberle, W. ; Derudder, V. ; Van der Perre, L. ; Vanwijnsberghe, G. ; Vergara, M. ; Deneire, Luc ; Gyselinckx, B. ; Engels, M. ; Bolsens, I. ; De Man, H.

Author_Institution

IMEC, Leuven, Belgium

fYear

2001

fDate

7-7 Feb. 2001

Firstpage

336

Lastpage

337

Abstract

OFDM forms the physical layer for upcoming broadband wireless LAN standards like IEEE 802.11a and ETSI Hiperlan/2. A throughput of 72Mb/s after coding within a 20MHz bandwidth requires spectrally-efficient modulation schemes up to 64-QAM. This requires transceiver implementations that extend the capabilities of classic OFDM signal processing to fast-burst communication in a multipath indoor environment. The presented ASIC includes a parameterizable interpolating equalizer architecture, clock offset tracking, and a robust programmable acquisition, covering all transmission modes from BPSK to 64-QAM.

Keywords

CMOS digital integrated circuits; equalisers; indoor radio; multipath channels; quadrature amplitude modulation; transceivers; wireless LAN; 0.18 micron; 20 MHz; 5 GHz; 64-QAM OFDM transceiver; 72 Mbit/s; CMOS; ETSI Hiperlan/2; IEEE 802.11a; clock offset tracking; fast-burst communication; multipath indoor environment; parameterizable interpolating equalizer architecture; programmable acquisition; throughput; transceiver implementations; transmission modes; wireless LAN; Bandwidth; Indoor environments; Modulation coding; OFDM modulation; Physical layer; Signal processing; Telecommunication standards; Throughput; Transceivers; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-6608-5

Type

conf

DOI

10.1109/ISSCC.2001.912663

Filename

912663