DocumentCode
2983648
Title
Effect of gate pulse variation on the performance of fifteen-level cascaded H-bridge voltage source inverter
Author
Al-Hanai, Tuka ; Al-Hanaei, Thuraya ; Veeranna, Sreenivasappa B. ; Beig, Abdul R.
Author_Institution
Electr. Eng. Dept., Pet. Inst., Abu Dhabi, United Arab Emirates
fYear
2011
fDate
19-22 Feb. 2011
Firstpage
85
Lastpage
88
Abstract
This paper proposes a fifteen level H-Bridge cascaded multilevel inverter with fundamental frequency switching for low power applications such as solar powered power supplies, battery powered standby power supplies. The effect of the variation of gate pulse on the performance of the inverter for different conditions of gate pulse variation is studied and simulation results are presented. Experimental implementation of gate pulse generation on a low cost FPGA is presented. The results presented in this paper are useful in designing the inverter, determining the control range of the inverter for the reliable and stable closed loop and fault tolerant operation of the inverter.
Keywords
closed loop systems; fault tolerance; field programmable gate arrays; invertors; battery powered standby power supply; fault tolerant; fifteen-level cascaded H-bridge voltage source inverter; fundamental frequency switching; gate pulse variation; low cost FPGA; solar powered power supply; Bridge circuits; Field programmable gate arrays; Inverters; Logic gates; Power supplies; Switches; Topology; Cascade H-Bridge inverter; THD; voltage source inverter;
fLanguage
English
Publisher
ieee
Conference_Titel
GCC Conference and Exhibition (GCC), 2011 IEEE
Conference_Location
Dubai
Print_ISBN
978-1-61284-118-2
Type
conf
DOI
10.1109/IEEEGCC.2011.5752628
Filename
5752628
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