Performance Enhancement in Uniaxially Tensile Strained-Si Gate-All-Around Nanowire n-MOSFETs

We report, for the first time, the fabrication and characterization of the uniaxially tensile strained- Si gate-all-around (GAA) nanowire (NW) n-MOSFETs. Multi-gate and NW MOSFETs have previously been shown to have excellent electrostatics and immunity to short channel effects. Uniaxially strained-Si in the (110) direction has also been predicted to have the maximum NMOS performance (in terms of electron velocity in Si). One possible technique to create uniaxial tensile Si is to preferentially etch biaxially strained-Si into bars to relax the strain in the transverse direction. Tri-gate MOSFETs based on this technique have been reported. For tri-gate structures, since the mobility of the two (110) sidewalls is less than that of the (100) surface, some of the strain-assisted performance enhancement is reduced. On the other hand, GAA structures utilize the bottom (100) surface to increase the drive current and to reduce the influence of the (110) planes.