Jitter analysis of digital frequency dividers in communication systems

This paper focuses on analysis of jitter in digital frequency dividers in communication systems. Both broadband and narrowband communication systems require precise frequency synthesis, which necessitates high quality frequency dividers. Jitter in frequency dividers can lower the MIPS rating in digital signal processors or increase the bit error rate in digital communication systems. In this paper, a new method of analysing jitter in the time-domain is given. The time-varying nature of jitter is taken into account to analyze both synchronous and asynchronous frequency dividers. The analysis reveals that under some conditions, asynchronous frequency dividers can approach or even outperform synchronous dividers. The results are validated by experimental results.