DocumentCode :
2983821
Title :
A filtering technique to lower oscillator phase noise
Author :
Hegazi, E. ; Sjoland, H. ; Abidi, A.
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear :
2001
fDate :
7-7 Feb. 2001
Firstpage :
364
Lastpage :
365
Abstract :
Test oscillators are implemented using the noise filtering schemes described: a top-biased and a tail-biased VCO for the 1GHz band, and a tail-biased VCO for the 2.2GHz band. These CMOS circuits are fabricated in the STMicroelectronics BiCMOS 6M process.
Keywords :
CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; phase noise; voltage-controlled oscillators; 1 GHz; 2.2 GHz; BiCMOS 6M process; CMOS circuits; STMicroelectronics; filtering technique; oscillator phase noise; tail-biased VCO; top-biased VCO; Circuit noise; Circuit optimization; Filtering; MOS capacitors; Noise figure; Noise measurement; Phase measurement; Phase noise; Semiconductor device measurement; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2001. Digest of Technical Papers. ISSCC. 2001 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-6608-5
Type :
conf
DOI :
10.1109/ISSCC.2001.912675
Filename :
912675
Link To Document :
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