Title :
A Three-port / Three-access Register File For Concurrent Processsing And I/O Communication In A Risc-like Graphics Engine
Author :
Anido, M.L. ; Allerton, D.J. ; Zaluska, E.J.
Author_Institution :
University of Southampton
fDate :
May 28 1989-June 1 1989
Keywords :
Computer Architecture, Reduced Instruction Set Computers, VLSI Design, Computer Image Generation, Interprocessor Communication.; Computer aided instruction; Computer architecture; Computer graphics; Concurrent computing; Engines; Image generation; Permission; Pipelines; Reduced instruction set computing; Registers;
Conference_Titel :
Computer Architecture, 1989. The 16th Annual International Symposium on
Conference_Location :
Jerusalem
Print_ISBN :
0-8186-8948-X
DOI :
10.1109/ISCA.1989.714573
