DocumentCode :
2984467
Title :
A 5.6 GHz Balanced Colplitts QVCO With Back-gate Coupling Technique
Author :
Chen, Hwan-Mei ; Jhuang, You-Da ; Lin, Jia-Cing ; Jang, S.-L.
Author_Institution :
Lunghwa Univ. of Sci. & Tech., Taipei
fYear :
2007
fDate :
20-22 Dec. 2007
Firstpage :
965
Lastpage :
967
Abstract :
A 5.6 GHz quadrature voltage-controlled oscillator (QVCO) designed with balanced Colpitts topology and coupled with back-gate coupling technique is presented. The use of back-gate of the core transistor as coupling terminals removes the noise contributed from the coupling transistor of conventional QVCO and reduces power consumption. The prototype is implemented using TSMC standard 0.18 mum 1P6M CMOS process technology. With 1.8 V power supply, the phase noise of the QVCO is -113 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 5.6 GHz, and tuning range is 330 MHz. The figure of merit is -174.6 dB. Power consumption is 21.6 mW.
Keywords :
CMOS integrated circuits; integrated circuit noise; low-power electronics; phase noise; voltage-controlled oscillators; CMOS process technology; QVCO; TSMC standard; back-gate coupling technique; balanced Colpitts topology; carrier frequency; core transistor; coupling transistor; offset frequency; phase noise; power consumption; power supply; quadrature voltage-controlled oscillator; CMOS process; CMOS technology; Energy consumption; Frequency; Noise reduction; Phase noise; Power supplies; Prototypes; Topology; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0637-1
Electronic_ISBN :
978-1-4244-0637-1
Type :
conf
DOI :
10.1109/EDSSC.2007.4450287
Filename :
4450287
Link To Document :
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