Title :
CMOS 0.18um Dual-Wideband Low-Noise Amplifier for Ultra-Wideband Wireless Receiver
Author :
Huang, Zhe-Yang ; Huang, Che-Cheng
Abstract :
In this paper a CMOS dual-wideband low-noise amplifier (LNA) is designed for ultra- wideband (UWB) wireless receiver radio system. The design consists of a wideband input impedance matching network, two stage cascode amplifiers with shunt-peaked load, a notch filter and an output buffer for measurement purpose. It is simulated in TSMC 0.18 um standard RF CMOS process. The LNA gives 13.66 dB maximum power gain between 3.0 GHz- 4.9 GHz and 10.34 dB maximum power gain between 6.0 GHz-10.3 GHz while consuming 24.07 mW through a 1.8 V supply. Over the 3.1 GHz-4.9 GHz frequency band and the 6.0 GHz-10.3 GHz, a minimum noise figure is 2.6 dB and 3.8 dB. Input return loss lower than -8.3 ldB in all bandwidth have been achieved.
Keywords :
CMOS integrated circuits; impedance matching; low noise amplifiers; notch filters; radio receivers; ultra wideband communication; CMOS dual-wideband low-noise amplifier; frequency 3 GHz to 4.9 GHz; frequency 6 GHz to 10.3 GHz; gain 10.34 dB; gain 13.66 dB; notch filter; power 24.07 mW; shunt-peaked load; size 0.18 mum; ultra-wideband wireless receiver radio system; voltage 1.8 V; wideband input impedance matching network; Broadband amplifiers; Gain; Impedance matching; Impedance measurement; Low-noise amplifiers; Matched filters; Radio frequency; Radiofrequency amplifiers; Receivers; Ultra wideband technology;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2007. EDSSC 2007. IEEE Conference on
Conference_Location :
Tainan
Print_ISBN :
978-1-4244-0637-1
Electronic_ISBN :
978-1-4244-0637-1
DOI :
10.1109/EDSSC.2007.4450293