DocumentCode
2984598
Title
Architectural analysis of a shared resource digital signal processor
Author
Engler, James F., Sr.
Author_Institution
Westinghouse Electr. Corp., Baltimore, MD, USA
fYear
1988
fDate
23-27 May 1988
Firstpage
944
Abstract
The processor-simulation approach taken for the Westinghouse signal processor architectural simulator is described. Detailed representations of the Westinghouse distributed operating system and abstract representations of the physical capabilities of the hardware provide a shell for the analysis of signal processing activity. In this environment, a user specifies the mode description (which is refined over time) and the results determine what constraints are imposed by the nature of the chosen system
Keywords
computer architecture; computerised signal processing; operating systems (computers); Westinghouse distributed operating system; digital signal processor; shared resource; signal processor architectural simulator; Application software; Computer architecture; Computer interfaces; Digital signal processors; Hardware; Memory management; Operating systems; Signal analysis; Signal processing; Strontium;
fLanguage
English
Publisher
ieee
Conference_Titel
Aerospace and Electronics Conference, 1988. NAECON 1988., Proceedings of the IEEE 1988 National
Conference_Location
Dayton, OH
Type
conf
DOI
10.1109/NAECON.1988.195122
Filename
195122
Link To Document