Title :
Analysis Of Vector Access Performance On Skewed Interleaved Memory
Author :
Chen, Chuen-Liang ; Liao, Chung-Kai
Author_Institution :
National Taiwan University
fDate :
28 May-1 Jun 1989
Keywords :
Aggregates; Central Processing Unit; Computer architecture; Computer science; Delay effects; Hardware; Interleaved codes; Performance analysis; Permission; Supercomputers;
Conference_Titel :
Computer Architecture, 1989. The 16th Annual International Symposium on
Print_ISBN :
0-8186-8948-X
DOI :
10.1109/ISCA.1989.714577