Author_Institution :
Dept. Grad., Xi´an Microelectron. Technol. Inst., Xi´an, China
Abstract :
For the space application, error detection and correction (EDAC) technique is often adopted to protect memory cells against Single Event Upset (SEU) errors. To improve the EDAC ability and in view of the parity memory having 8 bits width, a single error correction and double error detection (SEC-DED) (40,32) Hamming code is proposed. This scheme is on the base of (39,32) Hsiao code, adding a check bit to minimize the probability of 3 bits faults corrected in error. To optimize the EDAC circuit area, an algorithm solving mutual expressions is proposed. Experimental results indicate that, compared with the (39,32) Hsiao code method, the critical path delay of the encoder and that of the decoder are not increased, the EDAC circuit area only adds 297.044982 um2, and if the 2GB external memory is protected by the two schemes respectively, the SEU failure rate using the (40,32) Hamming code method can be lower by one order of magnitude. By using the proposed algorithm solving mutual expressions, the circuit area of the encoder and decoder of the (40,32) Hamming code scheme all reduce 72.988199 um2, and the encoder area decreases by 5.9%.
Keywords :
Hamming codes; error correction codes; error detection codes; probability; Hsiao code; SEC DED Hamming code algorithm; critical path delay; double error detection; error detection and correction technique; memory cells; single error correction; single event upset errors; space application; Circuit faults; Decoding; Delays; Equations; Linear matrix inequalities; Single event upsets; Vectors; Single Event Upset; decoder; encoder; error detection and correction code; failure rate;