• DocumentCode
    298534
  • Title

    Complementary-LVTSCR ESD protection scheme for submicron CMOS IC´s

  • Author

    Ker, Ming-Dou ; Wu, Chung-Yu ; Chang, Hun-Hsien ; Cheng, Tao ; Wu, Tain-Shun

  • Author_Institution
    Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • Volume
    2
  • fYear
    1995
  • fDate
    30 Apr-3 May 1995
  • Firstpage
    833
  • Abstract
    There is one LVTSCR (Low Voltage Trigger SCR) device merged with short-channel NMOS and another LVTSCR device merged with short-channel PMOS in a complementary style to offer effective and direct ESD discharging paths from the input or output pads to VSS and V DD powerlines. The DC switching voltage of LVTSCR devices is lowered to the snapback voltage of short-channel NMOS and PMOS devices. Experimental results show that it has an excellent ESD protection capability in a smaller layout area
  • Keywords
    CMOS integrated circuits; electrostatic discharge; integrated circuit technology; protection; DC switching voltage; ESD discharge paths; ESD protection scheme; LVTSCR; complementary style; low voltage trigger SCR; short-channel NMOS; short-channel PMOS; snapback voltage; submicron CMOS IC; Anodes; CMOS integrated circuits; CMOS process; Electrostatic discharge; MOS devices; Protection; Stress; Thyristors; Variable structure systems; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
  • Conference_Location
    Seattle, WA
  • Print_ISBN
    0-7803-2570-2
  • Type

    conf

  • DOI
    10.1109/ISCAS.1995.519892
  • Filename
    519892
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=298534