A 0.18-μm CMOS UWB LNA with 5 GHz Interference Rejection

A ultra-wideband low noise amplifier (LNA) with integrated notch filter for interference rejection is designed using 0.18-mum CMOS technology. The three-stage LNA employs a current reuse structure to reduce the power consumption and a serial LC circuit with Q-enhancement circuit to produce band rejection in the 5-6 GHz frequency band. The load tank optimization for the current reuse stage is discussed for gain flatness tuning Measurements show that this LNA has a peak gain of 21.5 dB in the low band (3-5 GHz) and 15 dB in the high band (6-10 GHz) while consuming 12 mA of current from a 1.8 V DC supply. The measured noise figure (NF) and IIP3 are 4.0 dB and -18.5 dBm at 3.5 GHz, 5.1 dB and -15.5 dBm at 7.2 GHz respectively. A 6-12 dB gain notch in the 5-6 GHz is realized for interference rejection.