DocumentCode
2986457
Title
On the Detection of Missing-Gate Faults in Reversible Circuits by a Universal Test Set
Author
Rahaman, Hafizur ; Kole, Dipak K. ; Das, Debesh K. ; Bhattacharya, Bhargab B.
Author_Institution
Bengal Engg. & Sc. Univ., Howrah
fYear
2008
fDate
4-8 Jan. 2008
Firstpage
163
Lastpage
168
Abstract
Logic synthesis with reversible circuits has received considerable interest in the light of advances recently made in quantum computation. Implementation of a reversible circuit is envisaged by deploying several special types of quantum gates, such as k-CNOT. Newer technologies like ion trapping or nuclear magnetic resonance are required to emulate quantum gates. Although the classical stuck-at fault model is widely used for testing conventional CMOS circuits, new fault models, namely, single missing-gate fault (SMGF), repeated-gate fault (RGF), partial missing-gate fault (PMGF), and multiple missing-gate fault (MMGF), have been found to be more suitable for modeling defects in quantum k-CNOT gates. In this paper, it is shown that in an (n times n) reversible circuit implemented with k-CNOT gates, addition of only one extra control line along with duplication each k-CNOT gate yields an easily testable design, which admits a universal test set of size (n +1) that detects all SMGFs, RGFs, and PMGFs in the circuit.
Keywords
CMOS logic circuits; combinational circuits; design for testability; fault diagnosis; integrated circuit design; integrated circuit testing; logic design; logic testing; quantum gates; CMOS circuits; design-for-testability technique; logic synthesis; multiple missing-gate fault detection; partial missing-gate fault detection; quantum computation; quantum k-CNOT gates; repeated-gate fault detection; reversible combinational circuits; single missing-gate fault detection; universal test set; CMOS technology; Circuit faults; Circuit synthesis; Circuit testing; Electrical fault detection; Fault detection; Logic circuits; Nuclear magnetic resonance; Quantum computing; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2008. VLSID 2008. 21st International Conference on
Conference_Location
Hyderabad
ISSN
1063-9667
Print_ISBN
0-7695-3083-4
Type
conf
DOI
10.1109/VLSI.2008.106
Filename
4450497
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