• DocumentCode
    2986676
  • Title

    Dynamic Aggregation of Virtual Addresses in TLB Using TCAM Cells

  • Author

    Samanta, Rupak ; Surprise, Jason ; Mahapatra, Rajat

  • Author_Institution
    Texas A & M Univ., College Station
  • fYear
    2008
  • fDate
    4-8 Jan. 2008
  • Firstpage
    243
  • Lastpage
    248
  • Abstract
    In this paper, we propose dynamic aggregation of virtual tags in the Translation Lookaside Buffer (TLB) to increase its storage capacity without increasing the size of the tag array. To support dynamic aggregation, we incorporate a few Ternary-CAM (TCAM) cells into the TLB tag array. The modified TLB architecture demonstrates a compression scheme that increases TLB reach with negligible overhead and no access time penalty. The performance of the proposed TLB architecture is evaluated using SPEC CPU2000 benchmarks. Simulation results indicate a significant reduction in miss ratios, nearly 100% reduction is achieved in several benchmarks, and as much as a 46% increase in IPC (Instructions per cycle) is obtained when compared to a conventional TLB with the same number of tag entries. We also evaluate the performance of our tag compressed TLB against the performance of a conventional TLB that contains an equivalent number of virtual to physical address translations. Our results show that TCAM based compression is able to achieve nearly the same system performance as the large conventional TLB while consuming on average 38% less energy and 42% less area; thus illustrating that tag compression is a more attractive solution for improving TLB performance than simply increasing the size of the TLB.
  • Keywords
    cache storage; content-addressable storage; memory architecture; storage allocation; virtual storage; SPEC CPU2000 benchmarks; compression scheme; content addressable memory cells; dynamic aggregation; instructions per cycle; miss ratio reduction; storage capacity; tag array size; ternary-CAM cells; translation lookaside buffer architecture; virtual addresses; Buffer storage; CADCAM; Clocks; Computer aided manufacturing; Computer science; Delay; Frequency; Kernel; System performance; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2008. VLSID 2008. 21st International Conference on
  • Conference_Location
    Hyderabad
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-3083-4
  • Type

    conf

  • DOI
    10.1109/VLSI.2008.57
  • Filename
    4450509