Combining hardware reconfiguration and adaptive computation for a novel SoC design methodology

In the face of dominant communication overheads and reconfiguration cost of programmable hardware often deployed in SoC environments, a new paradigm is necessary to revisit the partitioning and allocation problems. Our aim is to integrate generalized performance models into codesign to explore the gray area between hardware and software effectively. We propose to use the adaptive computation approach. Adaptivity implies that due to input changes the output of the system is updated only re-evaluating those portions of the program affected by the changes. We study the impact of our model onto a SoC architecture consisting of embedded processors and dynamically reconfigurable hardware. We present an image processing application mapped onto this architecture as a case study