Title :
Hardware channel model for ultra wideband systems
Author :
Kan, Wen Chih ; Sobelman, Gerald E.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minenapolis, MN
Abstract :
We present a digital hardware model for ultra wideband channels. The system runs at 80 MHz on a Xilinx Virtex-4 xc4vsx35 FPGA. High-speed arithmetic operations including division, square root, powering and normal random number generator are analyzed and developed for use as basic components in the channel emulator. The design flow is based on Matlab Simulink as the model builder, followed by Xilinx System Generator to transform the Simulink model into a VHDL description which can be synthesized and mapped onto the FPGA device. Speed and area results are given for the synthesized designs
Keywords :
field programmable gate arrays; hardware description languages; high-speed techniques; ultra wideband technology; 80 MHz; Matlab Simulink; VHDL description; Xilinx System Generator; Xilinx Virtex-4 xc4vsx35 FPGA; channel emulator; hardware channel model; random number generator; ultra wideband systems; Circuit testing; Digital arithmetic; Field programmable gate arrays; Gaussian noise; Hardware; Mathematical model; Power system modeling; Random number generation; Throughput; Ultra wideband technology;
Conference_Titel :
Field Programmable Technology, 2006. FPT 2006. IEEE International Conference on
Conference_Location :
Bangkok
Print_ISBN :
0-7803-9729-0
Electronic_ISBN :
0-7803-9729-0
DOI :
10.1109/FPT.2006.270332