Title :
A CMOS 5GHz Image-Reject Receiver Front-End Architecture
Author :
Ozis, Dicle ; Paramesh, Jeyanandh ; Allstot, David J.
Author_Institution :
Univ. of Washington, Seattle
Abstract :
A fully-integrated double quadrature heterodyne receiver front-end uses a two-stage Lange coupler and achieves a measured image rejection ratio > 55 dB over a 200MHz bandwidth at 5.25 GHz without any tuning or trimming. It also features 23.5 dB gain, -79 dBm sensitivity, 5.6 dB SSB noise figure, -7 dBm IIP3, -18dB SII and 1mm x 2mm chip area in 0.18 mum CMOS.
Keywords :
CMOS integrated circuits; circuit tuning; heterodyne detection; microwave receivers; CMOS image-reject receiver; bandwidth 200 MHz; double quadrature heterodyne receiver; frequency 5.25 GHz; gain 23.5 dB; size 0.18 mum; trimming; tuning; two-stage Lange coupler; Bandwidth; Contracts; Coupling circuits; Impedance matching; Microwave integrated circuits; Narrowband; Noise figure; Power dividers; Power transmission lines; Radio frequency; CMOS integrated circuits; couplers; lumped-element microwave circuits; receivers; transformers;
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 IEEE
Conference_Location :
Honolulu, HI
Print_ISBN :
1-4244-0530-0
Electronic_ISBN :
1529-2517
DOI :
10.1109/RFIC.2007.380892
