DocumentCode :
2987656
Title :
An Area and Power Efficient Cartesian Phase Shifter + Mixer Circuit Applied to WLAN System
Author :
Afsahi, Ali ; Behzad, Arya ; Au, Stephen ; Roufoogaran, Rozi ; Rael, Jacob
Author_Institution :
Broadcom Corp., San Diego
fYear :
2007
fDate :
3-5 June 2007
Firstpage :
357
Lastpage :
360
Abstract :
A two-antenna array receiver is designed for WLAN application to build a maximum ratio combiner (MRC) system. A new signal-path Cartesian phase generation and combination technique is proposed to shift the RF signal by 22.5 phase steps. The 3 dB improvement in received SNR is achieved in comparison to single path receiver. The 0.29 mm^2 RF paths consumes 30 mW in 0.13 mum CMOS process.
Keywords :
antenna arrays; mixers (circuits); phase shifters; wireless LAN; Cartesian phase shifter; WLAN system; maximum ratio combiner system; mixer circuit; power 30 mW; signal-path Cartesian phase generation; size 0.13 micron; two-antenna array receiver; Circuits; Gain; Jacobian matrices; Phase shifters; Phased arrays; Radio frequency; Receiving antennas; Robustness; Signal generators; Wireless LAN; Beamforming; CMOS; Cartesian; MRC phase shifter; phased array; wireless LAN;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 IEEE
Conference_Location :
Honolulu, HI
ISSN :
1529-2517
Print_ISBN :
1-4244-0530-0
Electronic_ISBN :
1529-2517
Type :
conf
DOI :
10.1109/RFIC.2007.380900
Filename :
4266448
Link To Document :
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