A Low Voltage, Low Ripple, on Chip, Dual Switch-Capacitor Based Hybrid DC-DC Converter

Here we propose a low voltage low ripple dual switch- capacitor based hybrid DC-DC converter which is suitable for high dropout embedded regulation. In the proposed topology, along with a linear regulator two switching capacitors are used to store and recycle the charge for better power efficiency. The linear regulator is used to reduce the amount of output voltage ripple that comes from the switching capacitors. The output ripple noise is further reduced by introducing a synthesized counter ripple through the linear regulator. With this noise reduction technique, for an acceptable output ripple noise, the switching capacitors are reduced to a value which can be implemented on chip. The proposed converter circuit is designed in 0.18 mu process for 3.3 V to 1.25 V conversion. With two switching capacitors of 150 pF each, for 10 mA load current and 50 pF load capacitor, peak-peak output voltage ripple is only 45 mV and the achieved power efficiency is 64%.