• DocumentCode
    2987744
  • Title

    Design and validation of execution schemes for dynamically reconfigurable architectures

  • Author

    Oppold, Tobias ; Eisenhardt, Sven ; Rosenstiel, Wolfgang

  • Author_Institution
    Dept. of Comput. Eng., Tuebingen Sand Univ.
  • fYear
    2006
  • fDate
    Dec. 2006
  • Firstpage
    353
  • Lastpage
    356
  • Abstract
    Mapping applications onto reconfigurable architectures can be done in many different ways. The features of the target architecture constrain the way an application can be mapped and executed significantly. Execution schemes are generated as an intermediate format in our approach to application mapping and constitute a useful level to compare features of different architectures. In this paper, we present execution schemes that take advantage of fast reconfiguration and results from mapping execution schemes to a commercial architecture
  • Keywords
    microprocessor chips; reconfigurable architectures; commercial architecture; dynamically reconfigurable architectures; mapping execution schemes; Application software; Arithmetic; Clocks; Computer architecture; Cyclic redundancy check; Design engineering; Hardware; National electric code; Reconfigurable architectures; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Technology, 2006. FPT 2006. IEEE International Conference on
  • Conference_Location
    Bangkok
  • Print_ISBN
    0-7803-9729-0
  • Electronic_ISBN
    0-7803-9729-0
  • Type

    conf

  • DOI
    10.1109/FPT.2006.270346
  • Filename
    4042468