DocumentCode
2988053
Title
Innovative Architecture for Future Generation High-Performance Processors and Systems - TOC
fYear
2007
fDate
11-13 Jan. 2007
Abstract
Presents the table of contents of the proceedings.
Keywords
Acceleration; Algorithm design and analysis; Chip scale packaging; Circuit simulation; Clustering algorithms; Data structures; Memory architecture; Object recognition; Real time systems; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Innovative architecture for future generation high-performance processors and systems, 2007. iwia 2007. international workshop on
Conference_Location
Maui, HI
ISSN
1537-3223
Print_ISBN
0-7695-3077-X
Type
conf
DOI
10.1109/IWIA.2007.6
Filename
4450635
Link To Document