Testbench Design for Mixed Signal SoC Based on Task Flow

To reduce the testing cost of IP cores in SoC systems, a novel design method of the testbench based on task flow is proposed in this paper, which tries to improve the test coverage, differing from reducing test time and resources. The method is designed for applying to a mixed-signal SoC system. With functional model analysis, as an example, the system DFG model for a mixed signal SoC is derived. Following the design specification and DFG, three tasks and their constraints to the system test are extracted. Finally the test-bench and test program are designed. The simulation results with Modelsim show that the functions coverage of the testbench based on task flow can reach 100% for IP modules.