Research challenges for plasma processes in the semiconductor factory of the future

Summary form only given. New semiconductor technology generations are introduced approximately every three years. Each new generation is characterized by reduced feature size and increased circuit complexity. By 1998, the semiconductor industry will introduce products with minimum feature sizes of 0.25 /spl mu/m and 7 M transistors/cm/sup 2/. Roughly every three years, the minimum feature size has decreased by 30% and transistor densities have nearly doubled. The drive to sub-0.25 /spl mu/m processing will place a premium on new manufacturing techniques and equipment to produce monolayer thin films with controllable physical and electrical properties. Plasma-based process equipment is used heavily in present technologies for deposition and etch manufacturing steps. Plasma reactors provide rapid cycle times and excellent uniformities, but produce high levels of contamination from plasma/electron bombardment and impurity condensation via gas phase nucleation As processes are extended to sub-0.25 /spl mu/m, the damage and impurities created by these plasma processes must be eliminated. The paper presents the current plasma based manufacturing approaches and the associated limitations for semiconductor integrated circuits. Novel approaches, such as neutral stream etch and plasma doping are described as elements of a broad range of research approaches in this field.