Sampling Clock Design Method Research for Real-Time Spectrum Analyzer´s ADC

With the modulation mode complexity and signal bandwidth increase, more rigorous requirement has been brought out to the sampling clock circuit of real time wide-band spectrum analyzer in order to achieve high performance of specifications, such as EVM. In this article, the author has analyzed the performance impact of sampling clock jitter to high speed sampling clock circuit, and by ADIsimPLL simulation, give out an implementation of high performance sampling circuit that meet the design requirement.