Title :
Symbolic analysis for fault detection in switch-level circuits
Author :
Xirgo, Ll Ribas ; Bordoll, J. Carrabina
Author_Institution :
Centre Nacional de Microelectron., Univ. Autonoma de Barcelona, Spain
fDate :
30 Apr-3 May 1995
Abstract :
In CMOS logic circuits, stuck-on and bridging faults are of special importance. This paper presents the theoretical foundations of a symbolic method to detect their presence and, implicitly, offer a test vector to sensitize the fault being therefore measurable through IDDQ techniques
Keywords :
Boolean functions; CMOS logic circuits; automatic testing; fault diagnosis; fault location; integrated circuit testing; logic testing; CMOS logic circuits; IDDQ techniques; bridging faults; fault detection; stuck-on faults; switch-level circuits; symbolic analysis; test vector; Boolean functions; Circuit faults; Data structures; Electrical fault detection; Equations; Joining processes; Logic devices; Logic functions; Switches; Switching circuits;
Conference_Titel :
Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
0-7803-2570-2
DOI :
10.1109/ISCAS.1995.520368
