A 15-GHz 7-channel SiGe:C PLL for 60-GHz WPAN Application

Author

Lee, Ja-Yol ; Lee, Sang-Heung ; Kim, Haecheon ; Yu, Hyun-Kyu

Author_Institution

ETRI, Daejeon

fYear

2007

fDate

3-5 June 2007

Firstpage

537

Lastpage

540

Abstract

In this paper, we present the design of 15-GHz frequency synthesizer for 60-GHz WPAN. The PLL generates 7 channels of output signals with 250 MHz step by using the highspeed programmable divider operating up to 10 GHz. A double cross-coupled LC VCO is used for achieving higher oscillation frequency and shows about 20 % tuning range. The PLL represents phase noise of -88 dBc/Hz at 1 MHz offset from 15.75 GHz and consumes 115 mA at 2.5 V supply voltage. The PLL occupies 0.7 times 0.8 mm2 area and is fabricated using 0.25 mum SiGe:C BiCMOS process technology.

Keywords

BiCMOS digital integrated circuits; Ge-Si alloys; carbon; digital phase locked loops; frequency synthesizers; integrated circuit design; integrated circuit noise; millimetre wave integrated circuits; phase noise; voltage-controlled oscillators; BiCMOS process technology; PLL; SiGe:C; current 115 mA; double cross-coupled LC VCO; frequency 15 GHz; frequency 60 GHz; frequency synthesizer design; high-speed programmable divider; phase noise; voltage 2.5 V; BiCMOS integrated circuits; Filters; Millimeter wave communication; Millimeter wave technology; Millimeter wave transistors; Phase locked loops; Phase noise; Radio frequency; Silicon; Voltage-controlled oscillators; 60 GHz; PLL; Phase Noise; SiGe:C; VCO;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 IEEE

Conference_Location

Honolulu, HI

ISSN

1529-2517

Print_ISBN

1-4244-0530-0

Electronic_ISBN

1529-2517

Type

conf

DOI

10.1109/RFIC.2007.380941

Filename

4266489