DocumentCode :
2988376
Title :
BDD/AOG-based algorithm for multiple error rectification in combinational circuits
Author :
Wahba, Ayman Mohamed
Author_Institution :
Dept. of Comput. & Syst. Eng., Ain Shams Univ., Cairo, Egypt
Volume :
2
fYear :
2000
fDate :
2000
Firstpage :
658
Abstract :
This paper presents a new algorithm for multiple error rectification in combinational logic circuits. The method is based on the use of AND/OR graphs and binary decision diagrams. AND/OR graphs are the corner stone of the rectification algorithm, while BDD´s are used to build the AND/OR graphs. A completely automated algorithm is presented for tree structured circuits and a semi-automated one for general circuits. The complexity of the algorithm and the execution times are independent of the number of errors
Keywords :
binary decision diagrams; combinational circuits; graph theory; logic CAD; minimisation of switching nets; AND/OR graphs; binary decision diagrams; combinational circuits; execution times; multiple error rectification; tree structured circuits; Algorithm design and analysis; Binary decision diagrams; Bismuth; Boolean functions; Combinational circuits; Computer errors; Data structures; Error correction; Inverters; Tree graphs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
Conference_Location :
Jounieh
Print_ISBN :
0-7803-6542-9
Type :
conf
DOI :
10.1109/ICECS.2000.912964
Filename :
912964
Link To Document :
بازگشت