Title :
Construction of polyvalent error control codes for multilevel memories
Author :
Gregori, Stefano ; Ferrari, Pietro ; Micheloni, Rho ; Torelli, Guido
Author_Institution :
Dipartimento di Elettronica, Pavia Univ., Italy
Abstract :
The introduction of the multilevel storage approach and the advances in semiconductor memory technology towards higher-density chips create new reliability challenges for the memory designer. This paper presents a method to construct polyvalent error control codes for multilevel memories, which protect data stored in memory cells working at a variable number of bits per cell. The obtainable error control scheme allows a flexible use of multilevel memories assuring required data protection by exploiting the same encoding/decoding circuit and check cells. Implementation aspects of an encoding/decoding circuit are also discussed
Keywords :
cellular arrays; error correction codes; integrated circuit reliability; integrated memory circuits; multivalued logic; check cells; data protection; encoding/decoding circuit; higher-density chips; memory cells; multilevel memories; multilevel storage approach; polyvalent error control codes; reliability; semiconductor memory technology; Circuits; Decoding; Encoding; Error correction; Error correction codes; Fabrication; Nonvolatile memory; Protection; Semiconductor device reliability; Semiconductor memory;
Conference_Titel :
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
Conference_Location :
Jounieh
Print_ISBN :
0-7803-6542-9
DOI :
10.1109/ICECS.2000.912986
