DocumentCode
2989373
Title
Comparison of Deadlock Recovery and Avoidance Mechanisms to Approach Message Dependent Deadlocks in On-chip Networks
Author
Lankes, Andreas ; Wild, Thomas ; Herkersdorf, Andreas ; Sonntag, Soeren ; Reinig, Helmut
Author_Institution
Inst. for Integrated Syst., Tech. Univ. Muenchen, Munich, Germany
fYear
2010
fDate
3-6 May 2010
Firstpage
17
Lastpage
24
Abstract
With the transition from buses to on-chip networks in SoCs the problem of deadlocks in on-chip interconnects arises. Deadlocks can be caused by routing cycles in the network, or by message dependencies, even if the network itself is actually free of routing cycles. Two basic approaches to counter message dependent deadlocks exist: deadlock avoidance, which is most popular in NoCs, and deadlock recovery, which has until now only been used in parallel computer networks. Deadlock recovery promises low buffer space requirements and does not impose restrictions on connections between individual communication partners. For this study, we have adapted a deadlock recovery scheme for the use in NoCs and compared it to strict ordering as a representative of deadlock avoidance in terms of throughput and buffer space. The results show significant buffer space savings for deadlock recovery, however, at the cost of reduced data throughput.
Keywords
buffer storage; integrated circuit interconnections; network routing; network-on-chip; system recovery; avoidance mechanism; buffer space; deadlock avoidance; deadlock recovery; message dependent deadlocks; network routing cycle; network-on-chip; on-chip interconnects; on-chip network; system-on-chip; Network-on-a-chip; System recovery; Network-on-chip; deadlock avoidance; deadlock recovery; message dependent deadlocks; strict ordering;
fLanguage
English
Publisher
ieee
Conference_Titel
Networks-on-Chip (NOCS), 2010 Fourth ACM/IEEE International Symposium on
Conference_Location
Grenoble
Print_ISBN
978-1-4244-7085-3
Electronic_ISBN
978-1-4244-7086-0
Type
conf
DOI
10.1109/NOCS.2010.11
Filename
5507567
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