Title :
High-speed CMOS current-mode wave-pipelined analog-to-digital converter
Author :
Wu, Chung-Yu ; Liow, Yu-Yee
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
In this paper, a new architecture 8-bit CMOS wave-pipelined current-mode A/D converter (IADC) is proposed and analyzed. The wave-pipelined theory is applied to the structure of the IADC. Thus, the conventional current sample-and-hold circuit is not needed in each stage of the pipelined IADC. From the HSPICE simulation results, the proposed IADC can achieve 8-bit accuracy with a sampling rate up to 20 MS/s when the input signal frequency is 900 kHz. The power dissipation of the IADC is 450 mW at 20 MS/s of conversion rate with a single 5 V power supply. The proposed IADC is designed and fabricated in a double-poly quadruple-metal 0.35 μm CMOS process
Keywords :
CMOS integrated circuits; analogue-digital conversion; current-mode circuits; high-speed integrated circuits; pipeline processing; 0.35 micron; 450 mW; 5 V; 8 bit; 900 kHz; A/D converter; analog-to-digital converter; current-mode ADC; double-poly quadruple-metal CMOS process; high-speed CMOS ADC; sampling rate; wave-pipelined; Analog integrated circuits; Analog-digital conversion; CMOS technology; Circuit simulation; Flip-flops; Mirrors; Random access memory; Signal generators; Switches; Voltage;
Conference_Titel :
Electronics, Circuits and Systems, 2000. ICECS 2000. The 7th IEEE International Conference on
Conference_Location :
Jounieh
Print_ISBN :
0-7803-6542-9
DOI :
10.1109/ICECS.2000.913023