Traffic characteristics evaluation of a shared buffer ATM switch

The performance of a shared buffer memory ATM (asynchronous transfer mode) switch that was investigated by hardware emulation is discussed. Cell loss ratio under balanced and unbalanced traffic conditions is considered. It is found that the buffer size of an 8×8 shared buffer switch is reduced by a factor of five compared to that of the separate buffer switch, under both random and bursty traffic conditions when the offered load is uniformly distributed across all output ports. However, when unbalanced traffic is offered to the switch, the advantage of buffer sharing is diminished and the performance degrades. This is prevented by employing a simple control strategy which consists of limiting the number of cells in the queue destined for a particular output port to a fraction of the total buffer size. It is shown that the optimal queue length limitation is about one half of the total buffer capacity of the switch