Title :
A single-state-transition fault model for sequential machines
Author :
Cheng, K.-T. ; Jou, J.-Y.
Author_Institution :
AT&T Bell Lab., Murray Hill, NJ, USA
Abstract :
A fault model in the state transition level of finite state machines is studied. In this model, called a single-state-transition (SST) fault model, a fault causes a state transition to go to a wrong destination state while leaving its input/output label intact. An analysis is given to show that a test set that detects all SST faults will also detect most multiple-state-transition (MST) faults in practical finite state machines. It is shown that, for an N-state M-transaction machine, the length of the SST fault test set is upper-bounded by 2*M*N/sup 2/ while the length is exponential in terms of N for a checking experiment. Experimental results show that the test set generated for SST faults achieves not only a high single stuck-at fault coverage but also a high transistor fault coverage for a multilevel implementation of the machine.<>
Keywords :
fault location; logic testing; sequential machines; multiple-state-transition; sequential machines; single-state-transition fault model; Automata; Circuit faults; Circuit testing; Fault detection; Sequential analysis; Sequential circuits;
Conference_Titel :
Computer-Aided Design, 1990. ICCAD-90. Digest of Technical Papers., 1990 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-2055-2
DOI :
10.1109/ICCAD.1990.129887