A novel architecture for reducing the sensitivity of multibit sigma-delta ADCs to DAC nonlinearity

Author

Adams, Mervyn H. ; Toumazou, Christofer

Author_Institution

Dept. of Electr. & Electron. Eng., Imperial Coll. of Sci., Technol. & Med., London, UK

Volume

1

fYear

1995

fDate

30 Apr-3 May 1995

Firstpage

17

Abstract

A novel first order sigma-delta architecture, which also shapes the nonlinearity of the DAC is proposed. Unlike other proposed solutions this topology consists of multibit quantisation noise only so offers enhanced stability and higher-order noise-shaping at the expense of a highly linear analog differentiator. The paper discusses some aspects of a practical realisation and possible extensions to higher order noise-shaping

Keywords

circuit stability; differentiating circuits; digital-analogue conversion; quantisation (signal); sensitivity; sigma-delta modulation; DAC nonlinearity; first order sigma-delta architecture; higher-order noise-shaping; linear analog differentiator; multibit quantisation noise; multibit sigma-delta ADCs; sensitivity; stability; Additive noise; Delta-sigma modulation; Feedback; Filters; Linearity; Multi-stage noise shaping; Noise cancellation; Noise shaping; Quantization; Stability;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on

Conference_Location

Seattle, WA

Print_ISBN

0-7803-2570-2

Type

conf

DOI

10.1109/ISCAS.1995.521440

Filename

521440