• DocumentCode
    2991745
  • Title

    A New High Resolution Frequency and Phase Synthesis Method based on `Flying-Adder´ Architecture

  • Author

    Gharaee, Hossein ; Tathesari, Elham

  • Author_Institution
    Tarbiat Modares Univ., Tehran
  • fYear
    2006
  • fDate
    Oct. 29 2006-Dec. 1 2006
  • Firstpage
    520
  • Lastpage
    523
  • Abstract
    High speed electronic systems demand frequency synthesizer of high resolution, wide bandwidth and fast switching speed. The "Flying-Adder" architecture is a frequency and phase synthesis technique that is based on a VCO of multiple delay stages. This Flying-Adder is implemented in Quartus software which its result shows that the highest frequency is about 83 MHz, when VCO oscillates at 5.2 MHz. In some cases, this architecture has a barrier of inherent jitter on the output frequency. In this brief, a new method is proposed for eliminating such jitter problem. This method is caused to achieve exact phase and frequency. This design is implemented in Quartus software with EP1K30QC208-1 device from ACEX IK series. When VCO is running at 0.651-10 MHz high resolution output frequency is achieved.
  • Keywords
    adders; electronic engineering computing; frequency synthesizers; ACEX IK series; EP1K30QC208-1 device; Quartus software; flying-adder architecture; frequency synthesis; high speed electronic systems; phase synthesis; Clocks; Computer architecture; Delay; Frequency synthesizers; High-speed electronics; Jitter; Phase locked loops; Signal resolution; Signal synthesis; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Electronics, 2006. ICSE '06. IEEE International Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    0-7803-9730-4
  • Electronic_ISBN
    0-7803-9731-2
  • Type

    conf

  • DOI
    10.1109/SMELEC.2006.380684
  • Filename
    4266667